About Chip Interfaces
Digital interface IP cores for JESD204, MIPI, Interlaken, CPRI/eCPRI, UCIe, UEC, DIFI, High Speed Ethernet and an ever-expanding portfolio. Built on more than a decade of interface design, verification and silicon delivery.
Silicon proven interface IPs for over a decade I Lyngby, Denmark I Chorzów, Poland
WHO WE ARE
Empowering innovation
Chip Interfaces develops digital interface IP for ASIC and FPGA across a wide range of protocols, data rates and applications.
Our first time right cores have been taped out in customer silicon for more than a decade, proven across multiple process nodes and fabs.
We consider ourselves at the forefront of innovation, empowering chip designers to achieve exceptional performance and reliability through significant investments in next-generation technologies.
Our commitment to quality and excellence, coupled with our true wish to make our customers succeed, is what positions us as a partner customers can trust with for their next project.
WHY WORK WITH US
Beyond the RTL
Interoperability
Our IPs are tested for Interoperability with leading PHY providers, so compatibility never becomes a schedule risk.
- Close collaboration with PHY partners on every core release
- Interoperability tests run against PHYs from Cadence, Synopsys, Silicon Creation and Extoll
- Controller IP validated with partner SerDes/PHY in both simulation and hardware
Pre-integration
Pre-integration is offered as a project option, moving controller and PHY bring-up to the team that developed the core.
- Controller and partner PHY integrated before delivery, on request
- Reference configurations and verification environments included with every core
- Interface bring-up taken off the project schedule
Flexible and customizable
IP cores are adapted to project requirements rather than delivered as fixed configurations.
- Silicon-agnostic, configurable IP for both ASIC and FPGA targets
- Customization offered and delivered on request
- Feature sets extended where project requirements call for it
- IP optimized for lower power, smaller area and higher performance
Direct support
Technical support comes directly from the design engineers, without an escalation matrix in between.
- Direct access to the engineers who wrote the RTL
- Continuity of the same engineers through integration and bring-up
- Support handled inside the design team rather than a separate function
PEOPLE
The team you work with
Management behind the team that delivers silicon proven IP cores.
Anne Voss Winther
Chief Executive Officer
Jørgen Carstensen
Head of R&D
25+ design and verification engineers
Flexible, customer-oriented teams in Denmark and Poland, developing cutting-edge interface IP cores.
CONTACT
Talk to us about your requirements
Tell us about the project you are working on and we will get back to you.
LOCATIONS
Denmark and Poland
Head office, global sales and engineering in Lyngby – Denmark, with additional engineering in Chorzów – Poland.
Denmark
Head office, global sales & Engineering- Address
- Chip Interfaces ApS
Haldor Topsøes Allé 1
2800 Lyngby, Denmark - Phone
- +45 70 70 76 24
- Sales
- sales@chipinterfaces.com
Poland
Engineering office- Address
- Chip Interfaces
Działkowa 8
41-506 Chorzów, Poland - Phone
- +45 70 70 76 24
- Sales
- sales@chipinterfaces.com
Anne Voss Winther
CEO
Anne is the CEO of Chip Interfaces and has been leading the operational functions of the company since its start. Anne is focused on professional project execution and high-quality on-time project deliveries. Striving to improve our way of working to always deliver the best-in-class products is what she holds in high regard.
Anne has 25 years’ experience with Program/Project Management leading cross-site development and production programs spread across all continents within the Telecommunications industry. She also holds a BS degree in Electronic Engineering and has been IPMA Certified Project Manager for over 10 years.
Jørgen Carstensen
Head of R&D
Jørgen Carstensen is heading the R&D team at Chip Interfaces. Jørgen is responsible for driving Chip Interfaces’ engineering activities and ensuring that the R&D team continually develops cutting-edge solutions that fulfill customer needs and have a first class quality.
Jørgen has more than 20 years of experience in development of high-tech solutions based on FPGA and ASIC technology. Prior to joining Chip Interfaces, he had extensive experience from several leading positions within the Telecommunications industry. Jørgen holds an M.Sc. in Electrical Engineering from the Technical University of Denmark.