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Chip Interfaces and Prodigy Technovations validate I3C Target at MIPI Plugfest in Poland

Chip Interfaces and Prodigy Technovations validate I3C Target at MIPI Plugfest in Poland

by Chip Interfaces | Sep 29, 2025 | News+cat

Press Release Copenhagen, September 29, 2025 – Chip Interfaces, a leader in high‑performance digital IP cores, collaborated with Prodigy Technovations during the recent MIPI I3C Plugfest in Warsaw to evaluate and refine its I3C target implementation under realistic,...
Chip Interfaces and Soliton Technologies jointly test their I3C Solution at MIPI Plugfest in Poland

Chip Interfaces and Soliton Technologies jointly test their I3C Solution at MIPI Plugfest in Poland

by Chip Interfaces | Sep 3, 2025 | News+cat

Press Release Copenhagen, September 03, 2025 – Chip Interfaces, a leading provider of high-performance chip-to-chip interface IP cores, and Soliton Technologies, a high-technology software company, announced the successful joint testing of their I3C solution at the...
Chip Interfaces, through its JESD204C IP, supports Extoll’s collaboration in the development of Eridan’s next-generation ASIC

Chip Interfaces, through its JESD204C IP, supports Extoll’s collaboration in the development of Eridan’s next-generation ASIC

by Chip Interfaces | Aug 27, 2025 | News+cat

Press Release Copenhagen, Denmark, August 27, 2025 – Chip Interfaces, a leading provider of high-performance chip-to-chip interface IP cores, is contributing significantly to EXTOLL’s collaboration with Eridan in the development of Eridan’s next-generation ASIC. As...
Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY

Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY

by Chip Interfaces | Jan 14, 2025 | News+cat

Press Release Copenhagen, January 14, 2025 – Chip Interfaces, a leading provider of high-performance chip-to-chip interface IP cores, is pleased to announce the successful completion of the interoperability test between its Interlaken IP core and Cadence’s 112G...
Ensuring Quality and Providing Exceptional Support for IP Cores at Chip Interfaces

Ensuring Quality and Providing Exceptional Support for IP Cores at Chip Interfaces

by Chip Interfaces | Nov 4, 2024 | Blog+blog

Why does one choose a Commercial-Off-The-Shelf (COTS) IP offering? While there are many factors involved in the decision making, a few critical ones that drive the end outcome are: Time Constraint: Developing an IP core from scratch can be time-consuming and...
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Recent Posts

  • UCIe D2D Adapter Explained: Architecture, Flit Mapping, Reliability, and Protocol Multiplexing
  • JESD204 Frame Mapping explained from converter samples to lanes
  • UA Link PCS customizations from 800GBASE-R Ethernet PCS Clause 172
  • Why What Where DIFI and the new version 1.3
  • Multiple ways JESD204 performs bitstream alignment

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